Second International Workshop on Heterogeneous Computing with Reconfigurable Logic
Event Type
Workshop
Accelerators
Heterogeneous Systems
TimeMonday, November 14th9am - 12:30pm
Location251-C
DescriptionThe advent of high-level synthesis (HLS) creates exciting new opportunities for using FPGAs in HPC. HLS allows programs written in OpenCL, C, etc. to be mapped directly and effectively to FPGAs, without the need for low-level RTL design. At the same time, FPGA-based acceleration presents the opportunity for dramatic improvements in performance and energy-efficiency for a variety of HPC applications. This workshop will bring together application experts, FPGA experts, and researchers in heterogeneous computing to present cutting-edge research and explore opportunities and needs for future research in this area.
More at: http://h2rc.cse.sc.edu/
More at: http://h2rc.cse.sc.edu/
