Presenter

Dr. Chen-Yong Cher is a Research Staff Member in the Computer Architecture Department at the IBM Thomas J. Watson Research Center. He received B.S., M.S. and Ph.D. degrees in Electrical and Computer Engineering from Purdue University, in 1998, 2000 and 2004, respectively. He subsequently joined IBM at the Thomas J. Watson Research Center, where he has worked on performance, thermal, process variation, power and soft error reliability for microprocessors. He has contributed to BlueGene/Q microarchitecture definition and is principal power and soft error reliability architect for Power Edge-of-Network (EN) and BlueGene/Q compute chips. He is an IEEE senior member. He has coauthored 20 patents and over 30 technical papers.