Daniel Faraj
Biography
Daniel Faraj is a senior Intel HPC architect with focus on performance aspects of the host fabric interface.
His roles range from analyzing performance characteristic and trends of Intel's interconnection fabrics, performance modeling, to help unlock and deliver the hardware performance to HPC applications. Prior to joining Intel in 2013, Daniel was an IBM advisory Software developer and performance analyst and collaborated with IBM research on the development of optimized messaging software stack for IBM line of massively supercomputers, BlueGene. In 2006, he graduated with a Ph. D in computer science from Florida State University where he spent years seeking to contribute solutions to the problem of developing efficient MPI collective communication primitives across platforms and applications. Daniel’s research interests span general area of HPC with focus on communication optimizations in MPI and parallel applications.
His roles range from analyzing performance characteristic and trends of Intel's interconnection fabrics, performance modeling, to help unlock and deliver the hardware performance to HPC applications. Prior to joining Intel in 2013, Daniel was an IBM advisory Software developer and performance analyst and collaborated with IBM research on the development of optimized messaging software stack for IBM line of massively supercomputers, BlueGene. In 2006, he graduated with a Ph. D in computer science from Florida State University where he spent years seeking to contribute solutions to the problem of developing efficient MPI collective communication primitives across platforms and applications. Daniel’s research interests span general area of HPC with focus on communication optimizations in MPI and parallel applications.
Presentations
Workshop
Architectures
I/O
Networks
Performance
SIGHPC Workshop
