Presenter

Sai Rahul Chalamalasetti is a Research Engineer in the Platform Architecture Lab of the Hewlett Packard Labs in Palo Alto, California. Before that Sai Rahul Chalamalasetti was a hardware engineer in the Silicon Design Lab of the HP Server division in Houston, Texas. He is involved in research and development of next-generation server architecture “The Machine” and workload acceleration technologies. He is also exploring high level programming frameworks for FPGAs. He received the M.S degree and Ph.D. degree from the University of Massachusetts Lowell in 2009 and 2012, respectively, both in computer engineering. He was a Research Associate Intern for HP Labs, Palo Alto, CA, and HP, Houston, Texas. He has authored or co-authored over fifteen publications in peer-reviewed journals and conference proceedings. He also co-authored three book chapters published by renowned publishers. His research interests include reconfigurable architectures, novel data-path and processor architectures for low-power consumption, design of high-level programming tool chains for field programmable gate arrays (FPGAs), and mapping massive data processing applications on FPGAs.